This invention relates generally to optical navigation, and more specifically to a CMOS chip on which an image is captured and then processed substantially on-chip in the digital domain.
Miniaturized optical navigation systems are known in the art using primarily analog-based technology. For example, pocket-sized scanners are known in the art whose architecture comprises a photo detector array, an analog spatial image enhancement filter, and an analog correlator with off-chip bias and control. While serviceable, the accuracy of such analog systems is not optimal since so much of the algorithmic processing of the image signal (e.g. filtration, correlation) is done in the analog domain. The complementary metal oxide silicon (CMOS) technology supporting chips performing this processing cause slight imperfections and variations in the physical CMOS structure (e.g. non-linearity, device mismatches, power supply issues) to substantially affect a predictable and repeatable performance of such analog systems. As a result, the systems are not very suitable for mass manufacture.
There is therefore a need in the art to process images on-chip in the digital domain. Digitized images are susceptible to precise algorithmic computations to give predictable and reliable results, allowing accurate navigation. Such dependability would lend itself better to mass manufacture. Digital processing also facilitates tuning of algorithmic parameters to xe2x80x9cfine-tunexe2x80x9d or customize a design to specific applications. Such tunability is not practical in an analog domain subject to the vagaries of physical CMOS structure.
These and other objects, features and technical advantages are achieved by an inventive CMOS digital integrated circuit (IC) chip on which an image is captured, digitized, and then processed on-chip in substantially the digital domain. A preferred embodiment comprises imaging circuitry including a photo cell array for capturing an image and generating a representative analog signal, conversion circuitry including an n-bit successive approximation register (SAR) analog-to-digital converter for converting the analog signal to a corresponding digital signal, filter circuitry including a spatial filter for edge and contrast enhancement of the corresponding image, compression circuitry for compressing the digital signal, correlation circuitry for processing the digital signal to generate a result surface on which a minima resides representing a best fit image displacement between the captured and previous images, interpolation circuitry for mapping the result surface into x- and y-coordinates, and an interface with a device using the chip, such as a hand-held scanner.
The filter circuitry, the compression circuitry, the correlation circuitry and the interpolation circuitry are all advantageously embodied in an on-chip digital signal processor (DSP). The DSP embodiment allows precise algorithmic processing of the digitized signal with almost infinite hold time, depending on storage capability. The corresponding mathematical computations are thus no longer subject to the vagaries of CMOS chip structure processing analog signals. As a result, precise and accurate navigation enables a predictable, reliable and manufacturable design.
Parameters may also be programmed into the DSP""s xe2x80x9csoftware,xe2x80x9d making the chip tunable, as well as flexible and adaptable for different applications. For example, the DSP can select regions of the photo cell array to process. The xe2x80x9cshutter speedxe2x80x9d of the photo cells also becomes programmable. Further, different filtration coefficients may be programmed into the filter circuitry for different applications. Different correlation methods are selectable (e.g. |a-b| versus (a-b)2, etc.).
Reduction to practice of the invention has shown that standard compression algorithms can reduce the digitized signal to 3-4 bits per photo cell. This reduced signal storage demand enables an excellent corresponding chip area reduction.
It is therefore a technical advantage of the present invention to provide a CMOS IC chip on which an image is captured, digitized, and then processed on-chip in substantially the digital domain.
A further technical advantage of the present invention is that the filter circuitry, the compression circuitry, the correlation circuitry and the interpolation circuitry are all advantageously embodied in an on-chip DSP. This digital processing enables improved precision and accuracy of image processing over analogous processing in the analog domain. A predictable, reliable and manufacturable design results. Parameters may also be programmed into the DSP""s xe2x80x9csoftware,xe2x80x9d making the chip tunable, as well as flexible and adaptable for different applications.
Another technical advantage of the present invention is to compress the digitized image to reduce its bandwidth.
Another technical advantage of the present invention is the ability, through on-chip digital processing, to correlate the present image with subsequent ones.
Another technical advantage of the present invention is that, in a preferred embodiment, the design scales well with high-density CMOS structure. The analog circuits can be isolated from the digital circuits in a xe2x80x9cfloorplanxe2x80x9d that minimizes the detrimental effect that low power supply voltage (as needed for digital circuitry) and digital switching noise can have on analog circuits.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and the specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.